The invention relates to a comparator.
A comparator is an analog circuit that compares one analog signal with another analog signal and furnishes a binary value (i.e., indicates a high or low state) that indicates the result of the comparison. An analog signal is a signal that can have any value between ground and the power supply voltage level.
FIG. 1 is a schematic diagram of a comparator 5. The comparator 5 compares a signal (called V+) at its positive, or non-inverting input, with a signal (called V-) at its negative, or inverting input. Ideally, when the difference between the V+ signal and the V- signal is positive, an output signal (called V.sub.OUT) of the comparator 5 is high, and ideally, when the difference between the V+ signal and the V- signal is negative, the V.sub.OUT signal is low.
The comparator 5 typically has a differential amplifier 11 for amplifying the difference between the V+ and V- signals. The differential amplifier 11 is formed from a differential pair of transistors that might be, for example, an n-channel metal-oxide-semiconductor (NMOS) transistor 8 (that receives the V- signal) and an NMOS transistor 10 (that receives the V+signal). The transistors 8 and 10 are coupled together at their source, and each transistor 8, 10 forms part of a differential side of the amplifier 11. Each side of the amplifier 11 also has a load transistor (e.g., PMOS transistors 12 and 14), and these load transistors 12 and 14 are coupled together in a current mirror arrangement.
Ideally, the two sides are symmetrical so that when both the positive and negative input terminals of the amplifier 11 are coupled together, the currents and voltages on both sides of the amplifier 11 are the same. To achieve this symmetry, typically, the aspect ratios of the load transistors and the aspect ratios of the differential pair of the transistors are matched.
FIG. 2 is an illustration of voltage transfer curves for the comparator 5. Quite often, due to variations in the process used to fabricate the comparator 5, the transistors of the amplifier 11 are not exactly matched. As a result, the comparator 5 does not exhibit ideal behavior (as shown by an ideal transfer curve 3), but rather has a small offset voltage present on one of the inputs of the comparator 5. For example, the comparator 5 may have an actual transfer curve 6 that is shifted to the right from the curve 3, and thus, the comparator 5 has a positive offset voltage (called V.sub.+OS). Likewise, the comparator 5 may have an actual transfer curve 7 that is shifted to the left from the curve 3, and thus, the comparator 5 has a negative offset voltage (called V.sub.-OS).
When the comparator 5 has an offset voltage, then the comparator 5 switches too early or too late, depending on the application which uses the comparator 5. Thus, this false switching can lead to an error in the output of the comparator. Although an attempt is often made to limit the extent of the offset voltage by matching the sizes of integrated devices (e.g., transistors) that form the comparator 5, quite often after fabrication, an offset voltage still exists.
Thus, a continuing need exists for a comparator that allows adjustment of an input offset voltage after fabrication.